The Impact of Vias on High-Speed PCB Design

High speed signals require impedance matching. Basically this means that the signal path must have a continuous impedance throughout which is matched with the receiver impedance. This is to prevent signal reflections that can corrupt the signal. In very basic language, the PCB track characteristic impedance depends on the track width, track copper height, distance from the reference GND plane and dielectric constant. This is a very clear statement in high speed designs, but there are several issues with vias. Via is a 90 deg turn in the signal path. Via geometry means that the signal path is different from a PCB track. Via does not have a reference plane by default.

The geometry and lack of reference plane means that the via impedance will usually be not matched with the PCB track. This can lead to signal reflection and thus compromise the signal integrity. Among the various elements that influence PCB performance, vias play a crucial role in maintaining signal integrity and reducing losses in high-speed and high-frequency circuits. This article delves into the impact of vias on such designs, examining their effects on signal transmission, challenges, and how to optimize their use. In this article we will explore:

• Via transitions in RF PCB layouts require meticulous design, especially at GHz frequencies.
• For HDI PCBs, proper via transition design and antipad sizing are crucial for maintaining impedance control.
• Ground plane via spacing, grounded coplanar waveguide design, and appropriate use of stitching vias are essential for different frequency bands.

What is a Vias and its Operational Characteristics?

Vias are conductive pathways drilled through a PCB, allowing electrical signals to pass between its layers. They are critical for compact and multilayer designs, serving functions such as signal routing, power delivery, and grounding. However, in high-speed and high-frequency designs, vias can introduce challenges such as signal distortion and impedance mismatch, which require careful handling. The operational characteristics of this structure include:

• A via has distributed inductance along its length just like any other conductor.

• A via also has distributed capacitance along its length formed by the barrel of the plated hole and the surrounding planes through which it travels.

• When a signal travels the whole length of the via the two parasitics, capacitance and inductance, form a transmission line much like any signal trace.

• When the signal travels only part of the length of the via, some of the capacitance is left hanging off the signal trace. This is often mistakenly identified as a “via stub”.

Impact of Vias on Signal Integrity:

When routing high-speed designs, careful via placement is crucial for maintaining signal integrity. Both traces and vias contribute to inductance, which can affect high-frequency signals. Minimize via usage to reduce added inductance and signal degradation. For differential pairs, ensure both traces use vias equally and stay together to avoid mismatched paths. Additionally, avoid creating voids in the ground plane due to via antipad overlaps, as this disrupts signal return paths, increasing EMI and signal integrity issues. Proper via placement ensures optimal performance in high-speed PCB designs.

• Impedance Discontinuity: Vias can create variations in impedance due to changes in the trace geometry and the addition of parasitic capacitance and inductance. This can result in signal reflections and degraded performance.

• Signal Loss: High-frequency signals experience losses due to the parasitic resistance and inductance introduced by vias. These losses increase with frequency, making via design critical.

• Crosstalk: Vias placed too closely can lead to electromagnetic coupling, causing crosstalk between signal paths. This is especially problematic in dense, high-speed designs.

• Delay and Skew: Vias can cause variations in signal propagation delays, leading to timing mismatches in differential signal pairs or across buses.

Via Discontinuity Mitigation in High Speed design:

A via presents a short section of change in geometry to a trace and can appear as a capacitive and/or an inductive discontinuity. These discontinuities result in reflections and some degradation of a signal as it travels through the via. Reduce the overall via stub length to minimize the negative impacts of vias (and associated via stubs). Because longer via stubs resonate at lower frequencies and increase insertion loss, keep these stubs as short as possible. In most cases, the stub portion of the via presents significantly more signal degradation than the signal portion of the via. We recommend keeping via stubs to less than 15 mils. Longer stubs must be back-drilled.

Challenges in Using Vias for High-Frequency Applications:

High-frequency signals behave differently compared to low-frequency signals, and the introduction of vias can present several challenges:

• Parasitic Effects: Vias inherently add parasitic capacitance and inductance, which can distort high-speed signals.
• Stub Effects: Vias can create stubs if not properly terminated, acting as resonators and degrading signal quality at certain frequencies.
• Return Path Discontinuity: High-frequency signals rely on uninterrupted return paths. Vias can interrupt these paths, leading to increased electromagnetic interference (EMI).

Mitigating High-Frequency Impedance Issues:

Implementing stitching vias and reducing the size of the antipad can effectively mitigate the rise in impedance within the 5 to 50 GHz frequency range. This is because the stitching vias and the antipad collectively influence the capacitance in parallel to the signal vias, thereby reducing the overall characteristic impedance of the via. Moving these elements closer together further decreases the impedance, aligning it more closely with the desired impedance target (either single-ended or differential). To know, how PCBs are assembled in  JLCPCB factory see our detailed article from here.

Best Practices for Transitioning Vias Between Layers:

1. Connected Via Spacing: Distance between two ground plane-connected via holes should not exceed one-tenth of the wavelength of maximum operating frequency.

For example, with a 2.4 GHz frequency, via holes should be spaced 6 mm apart. Placement around PCB edges reduces RF losses through the laminate.

2. Grounded Coplanar Waveguide: In mmWave PCBs, the primary transmission line structure is a grounded coplanar waveguide with a via fence. The via fence is designed for high-frequency isolation, suppressing frequencies below a cutoff and preventing mmWave signals from interfering with other board signals.

Implementation of Via According to the Channel Bandwidth:

Usually a myth about high speed circuits is “they have a high frequency clock” but in actual high speed signals depend on rise time and fall time of a signal. The diagram provides key insights into the quality of the signal:

1. Slow Signals with rise times significantly over 20 ns: For slow signals such as I2C, control signals, and slow GPIOs, no return or stitching vias are needed. At low frequencies, the impedance of vias on an RF transmission line also closely matches the downstream transmission line sections, provided these sections are impedance-matched. This reduces the need to worry about the via's impedance.

2. Channels less than 3 GHz Bandwidth: When crossing multiple plane layers, a ground return via is necessary. At frequencies below 3 GHz, the input impedance of via transitions often strays significantly from 50 Ohms if there is a nearby ground return via. Thus, specific stitching via structures is generally unnecessary unless dealing with very fast channels.

3. Channels over 5 GHz Bandwidth: Requires a carefully designed antipad and an array of stitching vias around the signal transition.

4. Channels greater than 90 GHz Bandwidth: Requires a completely different approach to layer transitions, potentially not involving vias at all. As frequencies increase, especially at mmWave frequencies, the significance of via impedance grows due to parasitic effects that can impact signal integrity.

Especially with bandwidths above 5 GHz, in the absence of stitching vias, transitions appear inductive. This trend continues as via transitions appear inductive with impedances increasing by factors of 3 to 4 up to 30 GHz or so. At even higher frequencies, the capacitance effects take over resulting in impedance decreasing up until around 50 GHz.

Optimizing Vias for High-Speed and High-Frequency Design:

Designing vias for optimal performance in high-speed and high-frequency applications involves several considerations:

1. Via Geometry: Use small-diameter vias to minimize parasitic capacitance and inductance. Microvias, common in HDI PCBs, are particularly effective for high-frequency designs.

2. Back-Drilling: Remove unused via stubs to eliminate resonances at high frequencies.

3. Controlled Impedance: Ensure via designs align with the board’s impedance requirements to avoid signal reflections.

4. Via Stitching: Use multiple ground vias around high-speed signal vias to ensure consistent return paths and reduce EMI.

5. Via-in-Pad: For dense designs, via-in-pad placement can reduce signal path lengths, though it requires advanced manufacturing techniques to prevent solder wicking.

Comparison with Traditional PCB Designs:

In low-speed or analog designs, vias have minimal impact on signal performance. However, as frequencies increase, the parasitic effects of vias become significant, requiring precise design techniques. Traditional PCB designs may use standard vias without much consideration for impedance or parasitics, but high-speed and high-frequency designs demand advanced via types such as blind vias, buried vias, or back-drilled vias to minimize signal degradation. To know more about different type of via in PCB design see our detailed blog on this.

Advantages of Well-Designed Vias in High-Speed PCBs:

When properly optimized, vias offer several benefits in high-frequency and high-speed PCB designs:

• Compact Routing: Vias enable multilayer routing, essential for complex and high-density designs.
• Improved Thermal Management: Thermal vias can dissipate heat from high-power components.
• Design Flexibility: Proper via design allows for signal routing without compromising performance.

Conclusion:

Vias are indispensable in PCB design but require careful consideration in high-speed and high-frequency applications. Poorly designed vias can degrade signal integrity, increase losses, and cause EMI issues. By understanding the parasitic effects of vias and employing advanced techniques such as back-drilling, controlled impedance, and via stitching, designers can mitigate these challenges. Optimization via design is key to unlocking the full potential of high-speed and high-frequency circuits, ensuring reliable performance in today's cutting-edge electronic devices.